(Total Credits:4, Lectures/Week:3, Practical/Week:2)
This course provides introduction to logic design and the basic building blocks used in digital systems, in particular digital computers. It starts with a discussion of combinational logic: logic gates, minimization techniques, arithmetic circuits, and modern logic devices such as programmable logic gates. The second part of the course deals with sequential circuits: flip-flops, counters, registers, etc. State machines will then be discussed and illustrated through case studies. In VHDL, the students will learn how a Hardware Description Language (HDL) is used to describe and implement hardware. The emphasis is not on the details and syntax of the language, but rather how the language infers hardware. They will see how to simulate and test that hardware and optimize their designs.
- Number Systems and Codes: Binary, Octal, Decimal and Hexadecimal number Systems and their conversion, Binary Addition and Subtraction, Gray Code, BCD Code, Excess-3 code, ASCII Code.
- Combinational logic design: Switching algebra, Logic families, Combinational circuit analysis, Combinational circuit minimization, K-Map of three, four, five variable functions, Minimizing SOP and POS expressions, Quine Mc-Clusky minimization, timing hazards, circuit timing, Combinational PLDs, PLA, PAL devices, Encoders, Decoders, Tri-State devices, Multiplexes, Comparators, Arithmetic circuits- Half and full adders, Ripple adders, Subtractors, Carry look ahead adders, Design of combinational logic circuits using multiplexers and decoders.
- Sequential logic design: Latches and flip flops, Edge triggered and Master-Slave flip flops (SR, JK, D, T etc.), Clocked synchronous state machine analysis and design, Designing state machines using state diagrams, Counters and shift registers, synchronous design methodology, clock skew, gating the clock, asynchronous inputs.
- Designing using VHDL: Introduction to VHDL, Modelling styles, Data flow, behavioural, structural and mixed, VHDL description of combinational networks, modelling flip flops using VHDL, VHDL models for multiplexer, compilation and simulation of VHDL code, modelling a sequential machine, variables, signals and constants, arrays, VHDL operators, VHDL functions, VHDL procedures, attributes, multilevel logic.
- Counters and shift Registers: Asynchronous counters, Synchronous counters, MOD counters, Shift- counters, Up-down counters, Ripple counters, Shift Registers: Serial in Serial out, Serial in parallel out, Parallel in Serial out and Parallel in Parallel out.
- Memories: Random access memory, TTL RAM cell, read write cycles, MOS-static RAM cell, dynamic RAM cell, refreshing ROMs EPROM.
Term work shall consist of performing minimum 10 to 12 Experiments based on above syllabus or as directed by the concerned staff (using Hardware and VHDL). Practical Examination shall be of three hours duration and consists of one program and the oral based on the syllabus and term work.
Text/ Reference Books:
- F. Wakerly, “Digital design- Principles and practices”, PH International Pearson India, Third edition
- Bhasker, “VHDL primer”, Pearson Education Asia, third edition
- I. Fletcher, “An Engineering approach to digital design”, PHI
- Samuel C. Lee, “Digital circuits and logic design”, PHI
- H. Roth Jr., “Digital systems design using VHDL”, PWS publishing company
- Kevin Skahill, “VHDL for programmable logic”, Addison Wesley